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Like other MOSFETs, nMOS transistors have four modes of operation: cut-off (or subthreshold), triode, saturation (sometimes called active), and velocity saturation. NMOS AND-by-default logic can produce unusual glitches or buggy behavior in NMOS components, such as the 6502 "illegal opcodes" which are absent in CMOS 6502s.
For an enhancement-mode nMOS MOSFET, the body effect upon threshold voltage is computed according to the Shichman–Hodges model, [4] which is accurate for older process nodes, [clarification needed] using the following equation:
A depletion-load NMOS NAND gate. In integrated circuits, depletion-load NMOS is a form of digital logic family that uses only a single power supply voltage, unlike earlier NMOS (n-type metal-oxide semiconductor) logic families that needed more than one different power supply voltage.
This equation comes from the approximate equation for a MOSFET in saturation mode: = (). where V th is the threshold voltage. This approximation ignores the Early effect (channel length modulation), among other things. In practice, this technique may underestimate the true mobility.
Enhancement-mode MOSFETs (metal–oxide–semiconductor FETs) are the common switching elements in most integrated circuits. These devices are off at zero gate–source voltage. NMOS can be turned on by pulling the gate voltage higher than the source voltage, PMOS can be turned on by pulling the gate voltage lower than the source voltage.
As the channel length becomes very short, these equations become quite inaccurate. New physical effects arise. For example, carrier transport in the active mode may become limited by velocity saturation. When velocity saturation dominates, the saturation drain current is more nearly linear than quadratic in V GS.
Velocity saturation greatly affects the voltage transfer characteristics of a field-effect transistor, which is the basic device used in most integrated circuits. If a semiconductor device enters velocity saturation, an increase in voltage applied to the device will not cause a linear increase in current as would be expected by Ohm's law ...
Even at saturation, however, there will always be some voltage from collector to emitter. Where the load line crosses the horizontal axis, the transistor current is minimum (approximately zero). The transistor is said to be cut off, passing only a very small leakage current, and so very nearly the entire supply voltage appears as V CE .