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  2. List of AMD Athlon II processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Athlon_II...

    CPU: K10 (or Husky or K10.5) with no L3 cache cores with an upgraded architecture known as Stars. L1 Cache: 64 KB Data per core and 64 KB Instructions per core; MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit, AMD64, Cool'n'Quiet, AMD-V; Support for up to four DIMMs of up to DDR3-1866 memory

  3. List of AMD Athlon processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Athlon_processors

    Athlon is a family of CPUs designed by AMD, targeted mostly at the desktop market.The name "Athlon" has been largely unused as just "Athlon" since 2001 when AMD started naming its processors Athlon XP, but in 2008 began referring to single core 64-bit processors from the AMD Athlon X2 and AMD Phenom product lines.

  4. Table of AMD processors - Wikipedia

    en.wikipedia.org/wiki/Table_of_AMD_processors

    Table of AMD processors. 4 languages. Italiano; ... Memory Controller Features L1 L2 L3 SIMD Speed/Power Other Changes Am386 Am386: Sx/SxL/SxLV [1] 1 No

  5. Athlon X4 - Wikipedia

    en.wikipedia.org/wiki/Athlon_X4

    AMD Athlon X4 is a series of budget AMD microprocessors for personal computers. These processors are distinct from A-Series APUs of the same era due to the lack of ...

  6. List of AMD processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_processors

    Llano AMD Fusion (K10 cores + Redwood-class GPU) (launch Q2 2011, this is the first AMD APU) uses Socket FM1 Bulldozer architecture; Bulldozer, Piledriver, Steamroller, Excavator (2011–2017) [ edit ]

  7. Athlon 64 X2 - Wikipedia

    en.wikipedia.org/wiki/Athlon_64_X2

    The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with another functional core on one die, and connecting both via a shared dual-channel memory controller/north bridge and additional control logic.