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  2. Substrate mapping - Wikipedia

    en.wikipedia.org/wiki/Substrate_mapping

    Substrate mapping (or wafer mapping) is a process in which the performance of semiconductor devices on a substrate is represented by a map showing the performance as a colour-coded grid. The map is a convenient representation of the variation in performance across the substrate, since the distribution of those variations may be a clue as to ...

  3. Three-dimensional integrated circuit - Wikipedia

    en.wikipedia.org/wiki/Three-dimensional...

    Electronic components are built on two semiconductor wafers. One wafer is diced; the singulated dice are aligned and bonded onto die sites of the second wafer. As in the wafer-on-wafer method, thinning and TSV creation are performed either before or after bonding. Additional die may be added to the stacks before dicing. [22] Wafer-to-Wafer

  4. Wafer (electronics) - Wikipedia

    en.wikipedia.org/wiki/Wafer_(electronics)

    In electronics, a wafer (also called a slice or substrate) [1] is a thin slice of semiconductor, such as a crystalline silicon (c-Si, silicium), used for the fabrication of integrated circuits and, in photovoltaics, to manufacture solar cells. The wafer serves as the substrate for microelectronic devices built in and upon

  5. File:Wafer flats convention v2.svg - Wikipedia

    en.wikipedia.org/wiki/File:Wafer_flats...

    Wafer flats convention, based on Image:Wafer flats convention.PNG. Conventional meaning of flats in semiconductor wafers. Red denotes material that has been removed. Wafer orientation is the orientation of the crystallographic plane in which the crystal grew. Wafer type indicated the type of doping.

  6. List of electronic component packaging types - Wikipedia

    en.wikipedia.org/wiki/List_of_electronic...

    Fan-out wafer-level packaging: Variation of WLCSP. Like a BGA package but with the interposer built directly atop the die and encapsulated alongside it. eWLB: Embedded wafer level ball grid array: Variation of WLCSP. MICRO SMD-Chip-size package (CSP) developed by National Semiconductor [21] COB: Chip on board: Bare die supplied without a package.

  7. Integrated circuit design - Wikipedia

    en.wikipedia.org/wiki/Integrated_circuit_design

    A challenge most critical to analog IC design involves the variability of the individual devices built on the semiconductor chip. Unlike board-level circuit design which permits the designer to select devices that have each been tested and binned according to value, the device values on an IC can vary widely which are uncontrollable by the ...

  8. Die (integrated circuit) - Wikipedia

    en.wikipedia.org/wiki/Die_(integrated_circuit)

    Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon (EGS) or other semiconductor (such as GaAs) through processes such as photolithography. The wafer is cut into many pieces, each containing one copy of the circuit. Each of these pieces is called a die.

  9. Wafer fabrication - Wikipedia

    en.wikipedia.org/wiki/Wafer_fabrication

    Wafer fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits on semiconductor wafers in a semiconductor device fabrication process. Examples include production of radio frequency amplifiers, LEDs, optical computer components, and microprocessors for computers. Wafer ...