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2. TEST (x86 instruction) - Wikipedia

   en.wikipedia.org/wiki/TEST_(x86_instruction)

   In the x86 assembly language, the TEST instruction performs a bitwise AND on two operands. The flags SF, ZF, PF are modified while the result of the AND is discarded. The OF and CF flags are set to 0, while AF flag is undefined. There are 9 different opcodes for the TEST instruction depending on the type and size of the operands. It can compare ...

3. Netwide Assembler - Wikipedia

   en.wikipedia.org/wiki/Netwide_Assembler

   The Netwide Assembler (NASM) is an assembler and disassembler for the Intel x86 architecture. It can be used to write 16-bit, 32-bit and 64-bit programs. It is considered one of the most popular assemblers for Linux and x86 chips. [3] It was originally written by Simon Tatham with assistance from Julian Hall.

4. JMP (x86 instruction) - Wikipedia

   en.wikipedia.org/wiki/JMP_(x86_instruction)

   In the x86 assembly language, the JMP instruction performs an unconditional jump. Such an instruction transfers the flow of execution by changing the program counter.There are a number of different opcodes that perform a jump; depending on whether the processor is in real mode or protected mode, and an override instruction is used, the instructions may take 16-bit, 32-bit, or segment:offset ...

5. x86 assembly language - Wikipedia

   en.wikipedia.org/wiki/X86_assembly_language

   x86 assembly language includes instructions for a stack-based floating-point unit (FPU). The FPU was an optional separate coprocessor for the 8086 through the 80386, it was an on-chip option for the 80486 series, and it is a standard feature in every Intel x86 CPU since the 80486, starting with the Pentium.

6. x86 instruction listings - Wikipedia

   en.wikipedia.org/wiki/X86_instruction_listings

   Move from general register to x86 debug register. [k] On Pentium and later processors, moves to the DR0-DR7 debug registers are serializing. MOV reg,TRx: 0F 24 /r [j] Move from x86 test register to general register. [n] MOV TRx,reg: 0F 26 /r [j] Move from general register to x86 test register. [n] ICEBP, INT01, INT1 [o] F1: In-circuit emulation ...

7. x86 SIMD instruction listings - Wikipedia

   en.wikipedia.org/wiki/X86_SIMD_instruction_listings

   The x86 instruction set has several times been extended with SIMD (Single instruction, multiple data) instruction set extensions.These extensions, starting from the MMX instruction set extension introduced with Pentium MMX in 1997, typically define sets of wide registers and instructions that subdivide these registers into fixed-size lanes and perform a computation for each lane in parallel.