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Socket 478 was intended to be the replacement for Socket 423, a Willamette-based processor socket which was on the market for only a short time. This was the last Intel desktop socket to use a pin grid array interface. All later Intel desktop sockets use a land grid array interface. Socket 478 was phased out with the launch of LGA 775 in 2004.
PCI Express 1 ×16 or 2 ×8 ports, single 32-bit 33 MHz PCI bus, DMI for ICH7 3200: Bigby-V 800 or 1066 or 1333 MT/s Two channels of ECC DDR2-667 or DDR2-800 PCI Express ×8 port, single 32-bit 33 MHz PCI bus, DMI for ICH9 ICH9 3210: Bigby-P PCI Express 1 ×16 or 2 ×8 ports, single 32-bit 33 MHz PCI bus, DMI for ICH9
VIA chipsets support CPUs from Intel, AMD (e.g. the Athlon 64) and VIA themselves (e.g. the VIA C3 or C7).They support CPUs as old as the i386 in the early 1990s. In the early 2000s, their chipsets began to offer on-chip graphics support from VIA's joint venture with S3 Graphics beginning in 2001; this support continued into the early 2010s, with the release of the VX11H in August 2012.
Update on 915P, with support for Serial ATA II, RAID mode 5, an improved memory controller with support for DDR-II at 667 MHz and additional PCI Express lanes. Support for DDR-I is dropped. Formal dual-core support was added to this chipset. Sub-versions: 945PL - No support for 1066 MT/s bus, only supports 2 GB of memory. 945G (Lakeport-G)
On 29 November 2011, PCI-SIG preliminarily announced PCI Express 4.0, [71] providing a 16 GT/s bit rate that doubles the bandwidth provided by PCI Express 3.0 to 31.5 GB/s in each direction for a 16-lane configuration, while maintaining backward and forward compatibility in both software support and used mechanical interface. [72]
Display controller with 1 MIPI DSI 1.2 port and 3 DDI ports (eDP 1.4b, MIPI DSI 1.2, DP 1.4a, or HDMI 2.0b) Integrated Intel HD Graphics (Gen11) GPU; PCI Express 3.0 controller supporting 8 lanes (multiplexed); 4 lanes available externally; Two USB 3.2 2x1 ports (a.k.a. USB 3.1) Four USB 3.2 1x1 ports (a.k.a. USB 3.0) Eight USB 2.0 ports; Two ...
Intel documentation now refers to the southbridge as the Legacy I/O Controller Hub. The X58 has 36 PCIe lanes that are arranged in two ×16 links, DMI link and "spare"-based link. When used with the ICH10 I/O Controller Hub with ×4 DMI connection the "spare" supports a separate ×4 PCIe connection. Future southbridge chips DMI may support a ...
Mobile PCI Express Module (MXM) is an interconnect standard for GPUs (MXM Graphics Modules) in laptops using PCI Express created by MXM-SIG. The goal was to create a non-proprietary, industry standard socket, so one could easily upgrade the graphics processor in a laptop, without having to buy a whole new system or relying on proprietary vendor upgrades.