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  2. System Management Bus - Wikipedia

    en.wikipedia.org/wiki/System_Management_Bus

    Again I²C does not have a similar specification. SMBus defines both rise and fall time of bus signals. I²C does not. The SMBus time-out specifications do not preclude I²C devices co-operating reliably on the SMBus. It is the responsibility of the designer to ensure that I²C devices are not going to violate these bus timing parameters.

  3. Southbridge (computing) - Wikipedia

    en.wikipedia.org/wiki/Southbridge_(computing)

    The LPC bridge provides a data and control path to the super I/O (the normal attachment for the PS/2 keyboard and mouse, parallel port, serial port, IR port, and floppy controller). SMBus controller. DMA controller. The 8237 DMA controller allows ISA or LPC devices direct access to main memory without needing help from the CPU. PIC and I/O APIC.

  4. Power Management Bus - Wikipedia

    en.wikipedia.org/wiki/Power_Management_Bus

    The Power Management Bus (PMBus) is a variant of the System Management Bus (SMBus) which is targeted at digital management of power supplies. Like SMBus, it is a relatively slow speed two wire communications protocol based on I²C. Unlike either of those standards, it defines a substantial number of domain-specific commands rather than just ...

  5. Control bus - Wikipedia

    en.wikipedia.org/wiki/Control_bus

    In computer architecture, a control bus is part of the system bus and is used by CPUs for communicating with other devices within the computer. While the address bus carries the information about the device with which the CPU is communicating and the data bus carries the actual data being processed, the control bus carries commands from the CPU and returns status signals from the devices.

  6. I/O Controller Hub - Wikipedia

    en.wikipedia.org/wiki/I/O_Controller_Hub

    ICH - 82801AA. The first version of the ICH was released in June 1999 along with the Intel 810 northbridge.While its predecessor, the PIIX, was connected to the northbridge through an internal PCI bus with a bandwidth of 133 MB/s, the ICH used a proprietary interface (called by Intel Hub Interface) that linked it to the northbridge through an 8-bit wide, 266 MB/s bus.

  7. Host adapter - Wikipedia

    en.wikipedia.org/wiki/Host_adapter

    Fibre Channel host bus adapter. The term host bus adapter (HBA) may be used to refer to a Fibre Channel interface card. In this case, it allows devices in a Fibre Channel storage area network to communicate data between each other – it may connect a server to a switch or storage device, connect multiple storage systems, or connect multiple servers. [2]

  8. Platform Controller Hub - Wikipedia

    en.wikipedia.org/wiki/Platform_Controller_Hub

    The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture , which used two chips–a northbridge and southbridge , and first appeared in the Intel 5 Series .

  9. Host controller interface (USB, Firewire) - Wikipedia

    en.wikipedia.org/wiki/Host_controller_interface...

    Open Host Controller Interface (OHCI) [1] is an open standard.. Die shot of a VIA VT6307 Integrated Host Controller used for IEEE 1394A communication. When applied to an IEEE 1394 (also known as FireWire; i.LINK or Lynx) card, OHCI means that the card supports a standard interface to the PC and can be used by the OHCI IEEE 1394 drivers that come with all modern operating systems.