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The USB 3.x family has had the same technical notation retroactively added in the USB 3.1 and USB 3.2 specification versions. Though this shows common principles and the same generations refer to the same nominal speeds, "Gen A" does not have the same exact meaning in both USB 3.x and USB4 specifications.
It preserves existing USB 3.1 SuperSpeed and SuperSpeed+ data modes and introduces two new SuperSpeed+ transfer modes over the USB-C connector using two-lane operation, doubling the signalling rates to 10 and 20 Gbit/s (raw data rate 1 and ~2.4 GB/s). USB 3.2 is only supported by USB-C, making previously used USB connectors obsolete.
USB 3.2, released in September 2017, [35] preserves existing USB 3.1 SuperSpeed and SuperSpeedPlus architectures and protocols and their respective operation modes, but introduces two additional SuperSpeedPlus operation modes (USB 3.2 Gen 1×2 and USB 3.2 Gen 2×2) with the new USB-C Fabric with signaling rates of 10 and 20 Gbit/s (raw data ...
The written USB 3.0 specification was released by Intel and its partners in August 2008. The first USB 3.0 controller chips were sampled by NEC in May 2009, [4] and the first products using the USB 3.0 specification arrived in January 2010. [5] USB 3.0 connectors are generally backward compatible, but include new wiring and full-duplex operation.
[32]: §4.9 Full-Featured USB Type-C devices are a mechanic prerequisite for multi-lane operation (USB 3.2 Gen 1x2, USB 3.2 Gen 2x2, USB4 2x2, USB4 3x2, USB Gen 4 Asymmetric). [32] USB-C devices support power currents of 1.5 A and 3.0 A over the 5 V power bus in addition to baseline 900 mA.
Thunderbolt 3, 4, or 5 ports USB-C Thunderbolt 3, 4, or 5 connector. Thunderbolt 3 is a hardware interface developed by Intel. [75] It shares USB-C connectors with USB, supports USB 3.1 Gen 2, [76] [77] [78] and can require special "active" cables for maximum performance for cable lengths over 0.5 meters (1.5 feet). Compared to Thunderbolt 2 ...
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The xHCI reduces the need for periodic device polling by allowing a USB 3.0 or later device to notify the host controller when it has data available to read, and moves the management of polling USB 2.0 and 1.1 devices that use interrupt transactions from the CPU-driven USB driver to the USB host controller.