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In electronics, a wafer (also called a slice or substrate) [1] is a thin slice of semiconductor, such as a crystalline silicon (c-Si, silicium), used for the fabrication of integrated circuits and, in photovoltaics, to manufacture solar cells. The wafer serves as the substrate for microelectronic devices built in and upon
Wafer fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits on semiconductor wafers in a semiconductor device fabrication process. Examples include production of radio frequency amplifiers, LEDs, optical computer components, and microprocessors for computers. Wafer ...
Substrate mapping (or wafer mapping) is a process in which the performance of semiconductor devices on a substrate is represented by a map showing the performance as a colour-coded grid. The map is a convenient representation of the variation in performance across the substrate, since the distribution of those variations may be a clue as to ...
A diagram of the semiconductor oxide transistors made by Frosch and Derick in 1957 [24]. In 1955, Carl Frosch and Lincoln Derick, working at Bell Telephone Laboratories, accidentally grew a layer of silicon dioxide over the silicon wafer, for which they observed surface passivation effects.
Etching is a critically important process module in fabrication, and every wafer undergoes many etching steps before it is complete. For many etch steps, part of the wafer is protected from the etchant by a "masking" material which resists etching. In some cases, the masking material is a photoresist which has been patterned using photolithography.
Doping of a pure silicon array. Silicon based intrinsic semiconductor becomes extrinsic when impurities such as Boron and Antimony are introduced.. In semiconductor production, doping is the intentional introduction of impurities into an intrinsic (undoped) semiconductor for the purpose of modulating its electrical, optical and structural properties.
A semiconductor is a material that is between the conductor and insulator in ability to conduct electrical current. [1] In many cases their conducting properties may be altered in useful ways by introducing impurities ("doping") into the crystal structure.
Wafer-to-wafer bonding can reduce yields, since if any 1 of N chips in a 3D IC are defective, the entire 3D IC will be defective. Moreover, the wafers must be the same size, but many exotic materials (e.g. III-Vs) are manufactured on much smaller wafers than CMOS logic or DRAM (typically 300 mm), complicating heterogeneous integration.