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In electronics and telecommunications, jitter is the deviation from true periodicity of a presumably periodic signal, often in relation to a reference clock signal. In clock recovery applications it is called timing jitter. [1] Jitter is a significant, and usually undesired, factor in the design of almost all communications links.
For example, UI is used to measure timing jitter in serial communications or in on-chip clock distributions. This measurement unit is extensively used in jitter literature. Examples can be found in various ITU-T Recommendations, [1] or in the tutorial from Ransom Stephens. [2]
It is used to specify clock stability requirements in telecommunications standards. [1] MTIE measurements can be used to detect clock instability that can cause data loss on a communications channel. [ 2 ]
Jitter is the undesired deviation from true periodicity of an assumed periodic signal in electronics and telecommunications, often in relation to a reference clock source. Jitter may be observed in characteristics such as the frequency of successive pulses, the signal amplitude , or phase of periodic signals.
The counter implementation's accuracy is limited by the clock frequency. If time is measured by whole counts, then the resolution is limited to the clock period. For example, a 10 MHz clock has a resolution of 100 ns. To get resolution finer than a clock period, there are time interpolation circuits. [6]
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Reference clock jitter translates directly to the output, but this jitter is a smaller percentage of the output period (by the ratio above). Since the maximum output frequency is limited to f c l k / 2 {\displaystyle f_{clk}/2} , the output phase noise at close-in offsets is always at least 6 dB below the reference clock phase noise.
In this image, the lower signal is the clock and the upper signal is the data. Data is recognized by the circuit at the positive edge of the clock. There are two time intervals illustrated in this image. One is the setup time, and the other is the timing margin. The setup time is illustrated in red in this image; the timing margin is ...