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The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chips–a northbridge and southbridge, and first appeared in the Intel 5 Series. The PCH controls certain data paths and support functions used in conjunction with Intel CPUs.
The Intel X79 (codenamed Patsburg) is a Platform Controller Hub (PCH) designed and manufactured by Intel for their LGA 2011 (Socket R) and LGA 2011-1 (Socket R2).. Socket and chipset support CPUs targeted at the high-end desktop (HEDT) and enthusiast segments of the Intel product lineup: Core i7-branded and Xeon-branded processors from the Sandy Bridge and Ivy Bridge CPU architectures.
Intel officially announced 12th Gen Intel Core CPUs on October 27, 2021, [8] mobile CPUs and non-K series desktop CPUs on January 4, 2022, [9] Alder Lake-P and -U series on February 23, 2022, [10] and Alder Lake-HX series on May 10, 2022.
Intel i945GC northbridge with Pentium Dual-Core microprocessor. This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx series).
Intel X99, codenamed "Wellsburg", is a Platform Controller Hub (PCH) designed and manufactured by Intel, targeted at the high-end desktop (HEDT) and enthusiast segments of the Intel product lineup. [ 2 ] : 10 The X99 chipset supports both Intel Core i7 Extreme and Intel Xeon E5-16xx v3 and E5-26xx v3 processors , which belong to the Haswell-E ...
DMI 1.0, introduced in 2004 with a data transfer rate of 1 GB/s with a ×4 link.. DMI 2.0, introduced in 2011, doubles the data transfer rate to 2 GB/s with a ×4 link.It is used to link an Intel CPU with the Intel Platform Controller Hub (PCH), which supersedes the historic implementation of a separate northbridge and southbridge.
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Typically in server platforms, CPUs are the PECI slaves and Platform Controller Hub (PCH) is the PECI master, meanwhile in client segment, CPU is usually the PECI slave and EC/BMC is the PECI master. PECI was introduced in 2006 with the Intel Core 2 Duo microprocessors. Support for PECI was added to the Linux kernel version 5.18 in 2022. [1]