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  2. PCI Express - Wikipedia

    en.wikipedia.org/wiki/PCI_Express

    PCI Express Mini Card (also known as Mini PCI Express, Mini PCIe, Mini PCI-E, mPCIe, and PEM), based on PCI Express, is a replacement for the Mini PCI form factor. It is developed by the PCI-SIG . The host device supports both PCI Express and USB 2.0 connectivity, and each card may use either standard.

  3. List of interface bit rates - Wikipedia

    en.wikipedia.org/wiki/List_of_interface_bit_rates

    PCI Express 3.0 (×8 link) [n] 64 Gbit/s: 7.88 GB/s: 2011 PCI Express 2.0 (×16 link) [n] 80 Gbit/s: 8 GB/s: 2007 RapidIO Gen2 16x: 80 Gbit/s: 10 GB/s: PCI Express 5.0 (×4 link) 128 Gbit/s: 15.75 GB/s: 2019 PCI Express 3.0 (×16 link) [n] 128 Gbit/s: 15.75 GB/s: 2011 CAPI: 128 Gbit/s: 15.75 GB/s: 2014 QPI (4.80GT/s, 2.40 GHz) 153.6 Gbit/s: 19. ...

  4. USB4 - Wikipedia

    en.wikipedia.org/wiki/USB4

    It also added a replacement of the previous tunneling of classic USB 3.2 connection speeds with "USB3 Gen T tunneling", which can exceed 20 Gbit/s and also removed PCIe overhead limitations. Around the release of the new USB4 2.0 specification, USB-IF also mandated new logos and marketing names to simplify representing the maximum supported bit ...

  5. List of Intel SSDs - Wikipedia

    en.wikipedia.org/wiki/List_of_Intel_SSDs

    The first, the SSD 510, used an SATA 6 Gigabit per second interface to reach speeds of up to 500 MB/s. [14] The drive, which uses a controller from Marvell Technology Group , [ 15 ] was released using 34 nm NAND Flash and came in capacities of 120 GB and 250 GB.

  6. Riser card - Wikipedia

    en.wikipedia.org/wiki/Riser_card

    There are only a few specified standards in regards to riser designs. Most use PCI Express edge connectors for data transfer. This allows for maximum data transfer speeds of 32 GB/s when using PCIe 4.0, along with 75W of power to be delivered from the host device. [4] Other specifications used for these cards include ExpressCard and PCI-X. [5]

  7. Compute Express Link - Wikipedia

    en.wikipedia.org/wiki/Compute_Express_Link

    On April 2, 2020, the Compute Express Link and Gen-Z Consortiums announced plans to implement interoperability between the two technologies, [16] [17] with initial results presented in January 2021. [18] On November 10, 2021, Gen-Z specifications and assets were transferred to CXL, to focus on developing a single industry standard. [19]