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English: Schematic structure of a CMOS chip, like it is built in the early 2000s. The graphic shows LDD-MISFET's on a SOI silicon substrate with five metallization layers and solder bump for flip-chip bonding. Also it shows the section for FEOL (front-end of line), BEOL (back-end of line) and first parts of back-end process.
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CMOS inverter (a NOT logic gate). Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss ", / s iː m ɑː s /, /-ɒ s /) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. [1]