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Full speed (FS) rate of 12 Mbit/s is the basic USB signaling rate defined by USB 1.0. All USB hubs can operate at this rate. High speed (HS) rate of 480 Mbit/s was introduced in 2001 by USB 2.0. High-speed devices must also be capable of falling-back to full-speed as well, making high-speed devices backward compatible with USB 1.1 hosts ...
The Hi-Speed USB logo. USB 2.0 was released in April 2000, adding a higher maximum signaling rate of 480 Mbit/s (maximum theoretical data throughput 53 MByte/s [25]) named High Speed or High Bandwidth, in addition to the USB 1.x Full Speed signaling rate of 12 Mbit/s (maximum theoretical data throughput 1.2 MByte/s). [26]
USB 3.0 SuperSpeed and USB 2.0 High-Speed versions defined USB 3.0 SuperSpeed – host controller (xHCI) hardware support, no software overhead for out-of-order commands; USB 2.0 High-speed – enables command queuing in USB 2.0 drives; Streams were added to the USB 3.0 SuperSpeed protocol for supporting UAS out-of-order completions
There are five speeds for USB data transfer: Low Speed, Full Speed, High Speed (from version 2.0 of the specification), SuperSpeed (from version 3.0), and SuperSpeed+ (from version 3.1). The modes have differing hardware and cabling requirements.
USB OTG is a part of a supplement [2] to the Universal Serial Bus (USB) 2.0 specification originally agreed upon in late 2001 and later revised. [3] The latest version of the supplement also defines behavior for an Embedded Host which has targeted abilities and the same USB Standard-A port used by PCs.
The physical phenomena on which the device relies (such as spinning platters in a hard drive) will also impose limits; for instance, no spinning platter shipping in 2009 saturates SATA revision 2.0 (3 Gbit/s), so moving from this 3 Gbit/s interface to USB 3.0 at 4.8 Gbit/s for one spinning drive will result in no increase in realized transfer rate.
Specified USB data rates of 1.5 Mbit/s (Low-speed), 12 Mbit/s (Full-speed), 480 Mbit/s (High-speed) and 5 Gbit/s (SuperSpeed). xHCI 1.0, errata files 1-4: Released on January 17, 2011. Incorporated initial review feedback from larger 1.0 public audience, Save-Restore clarifications, and Hardware LPM support.
High-Speed Inter-Chip (HSIC) is a chip-to-chip variant of USB 2.0 that eliminates the conventional analog transceivers found in normal USB. It was adopted as a standard by the USB-IF in 2007. The HSIC physical layer uses about 50% less power and 75% less board area compared to traditional USB 2.0. HSIC uses two signals at 1.2 V and has a ...