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  2. Intel microcode - Wikipedia

    en.wikipedia.org/wiki/Intel_Microcode

    In the mid-1990s, a facility for supplying new microcode was initially referred to as the Pentium Pro BIOS Update Feature. [18] [19] It was intended that user-mode applications should make a BIOS interrupt call to supply a new "BIOS Update Data Block", which the BIOS would partially validate and save to nonvolatile BIOS memory; this could be supplied to the installed processors on next boot.

  3. Transactional Synchronization Extensions - Wikipedia

    en.wikipedia.org/wiki/Transactional...

    In October 2018, Intel disclosed a TSX/TSX-NI memory ordering issue found in some Skylake processors. [26] As a result of a microcode update, HLE support was disabled in the affected CPUs, and RTM was mitigated by sacrificing one performance counter when used outside of Intel SGX mode or System Management Mode . System software would have to ...

  4. Downfall (security vulnerability) - Wikipedia

    en.wikipedia.org/wiki/Downfall_(security...

    Intel promised microcode updates to resolve the vulnerability. [1] The microcode patches have been shown to significantly reduce the performance of some heavily-vectorized loads. [7] Patches to mitigate the effects of the vulnerability have also been created as part of the forthcoming version 6.5 release of the Linux kernel. [8]

  5. Microcode - Wikipedia

    en.wikipedia.org/wiki/Microcode

    Intel processor microcode security update (fixes the issues when running 32-bit virtual machines in PAE mode) Notes on Intel Microcode Updates, March 2013, by Ben Hawkes, archived from the original on September 7, 2015; Hole seen in Intel's bug-busting feature, EE Times, 2002, by Alexander Wolfe, archived from the original on March 9, 2003

  6. Transient execution CPU vulnerability - Wikipedia

    en.wikipedia.org/wiki/Transient_execution_CPU...

    Intel reported that they are preparing new patches to mitigate these flaws. [24] On August 14, 2018, Intel disclosed three additional chip flaws referred to as L1 Terminal Fault (L1TF). They reported that previously released microcode updates, along with new, pre-release microcode updates can be used to mitigate these flaws. [25] [26]

  7. Sandy Bridge - Wikipedia

    en.wikipedia.org/wiki/Sandy_Bridge

    Bottom view of a Core i7-2600K. Sandy Bridge is the codename for Intel's 32 nm microarchitecture used in the second generation of the Intel Core processors (Core i7, i5, i3).The Sandy Bridge microarchitecture is the successor to Nehalem and Westmere microarchitecture.

  8. Raptor Lake - Wikipedia

    en.wikipedia.org/wiki/Raptor_Lake

    Raptor Lake CPUs have suffered issues with permanent damage from elevated voltage due to a vulnerable clock tree circuit, resulting in instability. Intel claims these issues have been since fixed in the latest microcode patches, which requires updating the motherboard's BIOS. [11] [12]

  9. Ivy Bridge (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Ivy_Bridge_(microarchitecture)

    Ivy Bridge is the final Intel platform on which versions of Windows prior to Windows 7 are officially supported by Microsoft. It is also the earliest Intel microarchitecture to officially support Windows 10 64-bit (NT 10.0). [7]