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  2. RapidIO - Wikipedia

    en.wikipedia.org/wiki/RapidIO

    The RapidIO architecture is a high-performance packet-switched electrical connection technology. It supports messaging, read/write and cache coherency semantics. Based on industry-standard electrical specifications such as those for Ethernet, RapidIO can be used as a chip-to-chip, board-to-board, and chassis-to-chassis interconnect.

  3. Memory-mapped I/O and port-mapped I/O - Wikipedia

    en.wikipedia.org/wiki/Memory-mapped_I/O_and_port...

    Memory-mapped I/O is preferred in IA-32 and x86-64 based architectures because the instructions that perform port-based I/O are limited to one register: EAX, AX, and AL are the only registers that data can be moved into or out of, and either a byte-sized immediate value in the instruction or a value in register DX determines which port is the source or destination port of the transfer.

  4. List of interface bit rates - Wikipedia

    en.wikipedia.org/wiki/List_of_interface_bit_rates

    This is a list of interface bit rates, is a measure of information transfer rates, or digital bandwidth capacity, at which digital interfaces in a computer or network can communicate over various kinds of buses and channels.

  5. List of computer bus interfaces - Wikipedia

    en.wikipedia.org/wiki/List_of_computer_bus...

    2×50 2.54 mm card edge: Designed around Intel 8080 but used with other processors too: Homebrew and industry use. VME: 1981: DIN 41612: 10 MByte/s: Motorola 68000 based: Industry use. STEbus: 1983: DIN 41612 a+c rows? Processor independent based: Industrial quality bus, 8-bit data / 20-bit address. Eurocard sized. Acorn system bus: 1979: DIN ...

  6. GSC bus - Wikipedia

    en.wikipedia.org/wiki/GSC_bus

    GSC was a general 32-bit I/O bus, similar to NuBus or Sun's SBus, although it was also used as a processor bus with the PA-7100LC and PA-7300LC processors. Several variations were produced over time, the later ones running at 40 MHz: GSC-1X The original GSC bus implemented on PA-7100LC and used in the Gecko (712), Mirage (715) and Electra ...

  7. Multibus - Wikipedia

    en.wikipedia.org/wiki/Multibus

    Multibus was an asynchronous bus that accommodated devices with various transfer rates while maintaining a maximum throughput. It had 20 address lines so it could address up to 1 Mb of Multibus memory and 1 Mb of I/O locations. Most Multibus I/O devices only decoded the first 64 Kb of address space.

  8. VESA Local Bus - Wikipedia

    en.wikipedia.org/wiki/VESA_Local_Bus

    The VESA Local Bus (usually abbreviated to VL-Bus or VLB) is a short-lived expansion bus introduced during the i486 generation of x86 IBM-compatible personal computers.Created by VESA (Video Electronics Standards Association), the VESA Local Bus worked alongside the then-dominant ISA bus to provide a standardized high-speed conduit intended primarily to accelerate video (graphics) operations.

  9. System bus - Wikipedia

    en.wikipedia.org/wiki/System_bus

    A system bus is a single computer bus that connects the major components of a computer system, combining the functions of a data bus to carry information, an address bus to determine where it should be sent or read from, and a control bus to determine its operation. The technique was developed to reduce costs and improve modularity, and ...