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  2. List of AMD Ryzen processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Ryzen_processors

    All the CPUs support DDR4-2933 in dual-channel mode, except for R7 2700E, R5 2600E, R5 1600AF and R3 1200AF which support it at DDR4-2666 speeds. All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset. No integrated graphics. L1 cache: 96 KB (32 KB data + 64 KB instruction) per core. L2 cache: 512 KB per core.

  3. List of AMD processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_processors

    Zen 5 series CPUs and APUs (released 2024) Granite Ridge Ryzen 9000 series (desktop) Strix Point Ryzen AI 300 series (laptop) Turin Epyc 9005 series (server)

  4. Comparison of Intel processors - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_Intel_processors

    Some Xeon Phi processors support four-way hyper-threading, effectively quadrupling the number of threads. [1] Before the Coffee Lake architecture, most Xeon and all desktop and mobile Core i3 and i7 supported hyper-threading while only dual-core mobile i5's supported it.

  5. Table of AMD processors - Wikipedia

    en.wikipedia.org/wiki/Table_of_AMD_processors

    Architecture Fabrication (nm) Family Release Date Code name Model Group Cores SMT Clock rate () Bus Speed & Type [a] Cache Socket Memory Controller Features L1 L2

  6. List of Intel processors - Wikipedia

    en.wikipedia.org/wiki/List_of_Intel_processors

    An iterative refresh of Raptor Lake-S desktop processors, called the 14th generation of Intel Core, was launched on October 17, 2023. [1] [2]CPUs in bold below feature ECC memory support only when paired with a motherboard based on the W680 chipset according to each respective Intel Ark product page.

  7. List of AMD processors with 3D graphics - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Processors...

    All the CPUs support DDR5-5200 in dual-channel mode. L1 cache: 64 KB (32 KB data + 32 KB instruction) per core. L2 cache: 1 MB per core. All the CPUs support 28 PCIe 5.0 lanes. 4 of the lanes are reserved as link to the chipset. Includes integrated RDNA 2 GPU on the I/O die with 2 CUs and clock speeds of 400 MHz (base), 2.2 GHz (boost).