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The 65xx family of microprocessors, consisting of the MOS Technology 6502 and its derivatives, the WDC 65C02, WDC 65C802 and WDC 65C816, and CSG 65CE02, all handle interrupts in a similar fashion. There are three hardware interrupt signals common to all 65xx processors and one software interrupt , the BRK instruction.
The CSG 65CE02 is an 8/16-bit microprocessor developed by Commodore Semiconductor Group in 1988. [1] It is a member of the MOS Technology 6502 family, developed from the CMOS WDC 65C02 released by the Western Design Center in 1983.
One popular 6502-based computer, the Commodore 64, used a modified 6502 CPU, the 6510. Unlike the 6503–6505 and 6507, the 6510 is a 40-pin chip that adds internal hardware: a 6-bit parallel I/O port mapped to addresses 0000 and 0001.
GeckOS is a multitasking operating system for MOS 6502, and compatible processors such as the MOS 6510. [1] The GeckOS operating system is one of the few successful attempts to implement a Unix-like operating system on the 6502 architecture.
Interior of the 6502 Second Processor. The 6502 Second Processor (using a 6502C) was clocked at 3 MHz, a full 50% faster than the 6502 inside a BBC Model B, and also had 64 KB of RAM, of which typically 30–44 KB was free for application data (compared to as little as 8.5 KB on an unexpanded Model B in graphics mode, or only 5.75 KB with the disc interface).
Apart from the initial model, there were a number of different versions of the Agat produced: [7] Agat-4: A small quantity of this model was released in 1983. While popular, it quickly became obsolete. Agat-7: The first mass-produced model, introduced in 1984, it featured more internal memory (96 KB) and disk capabilities than the Agat-4.
The directions for all 16 general lines (PA0-7, PB0-7) can be programmed independently. The control lines can be programmed to generate interrupts, automatically generate handshaking signals for devices on the I/O ports, or output a plain high or low signal.
The 65C02 is a low cost, general-purpose 8-bit microprocessor (8-bit registers and data bus) with a 16-bit program counter and address bus.The register set is small, with a single 8-bit accumulator (A), two 8-bit index registers (X and Y), an 8-bit status register (P), and a 16-bit program counter (PC).