When.com Web Search

  1. Ads

    related to: semiconductor wafer cleaning equipment parts diagram

Search results

  1. Results From The WOW.Com Content Network
  2. RCA clean - Wikipedia

    en.wikipedia.org/wiki/RCA_clean

    The RCA clean is a standard set of wafer cleaning steps which need to be performed before high-temperature processing steps (oxidation, diffusion, CVD) of silicon wafers in semiconductor manufacturing. Werner Kern developed the basic procedure in 1965 while working for RCA, the Radio Corporation of America.

  3. Etching (microfabrication) - Wikipedia

    en.wikipedia.org/wiki/Etching_(microfabrication)

    Etching is a critically important process module in fabrication, and every wafer undergoes many etching steps before it is complete. For many etch steps, part of the wafer is protected from the etchant by a "masking" material which resists etching. In some cases, the masking material is a photoresist which has been patterned using photolithography.

  4. SMIF (interface) - Wikipedia

    en.wikipedia.org/wiki/SMIF_(interface)

    Both wafers and reticles can be handled by SMIF pods in a semiconductor fabrication environment. Used in lithographic tools, reticles or photomasks contain the image that is exposed on a coated wafer in one processing step of a complete integrated semiconductor manufacturing cycle. Because reticles are linked so directly with wafer processing ...

  5. Wafer fabrication - Wikipedia

    en.wikipedia.org/wiki/Wafer_fabrication

    Wafer fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits on semiconductor wafers in a semiconductor device fabrication process. Examples include production of radio frequency amplifiers, LEDs, optical computer components, and microprocessors for computers. Wafer ...

  6. Reactive-ion etching - Wikipedia

    en.wikipedia.org/wiki/Reactive-ion_etching

    The wafer platter is electrically isolated from the rest of the chamber. Gas enters through small inlets in the top of the chamber, and exits to the vacuum pump system through the bottom. The types and amount of gas used vary depending upon the etch process; for instance, sulfur hexafluoride is commonly used for etching silicon .

  7. Front end of line - Wikipedia

    en.wikipedia.org/wiki/Front_end_of_line

    Illustration of FEOL (device generation in the silicon, bottom) and BEOL (depositing metalization layers, middle part) to connect the devices. CMOS fabrication process. The front end of line (FEOL) is the first portion of IC fabrication where the individual components (transistors, capacitors, resistors, etc.) are patterned in a semiconductor substrate. [1]

  8. Microfabrication - Wikipedia

    en.wikipedia.org/wiki/Microfabrication

    Simplified illustration of the process of fabrication of a CMOS inverter on p-type substrate in semiconductor microfabrication. Each etch step is detailed in the following image. The diagrams are not to scale, as in real devices, the gate, source, and drain contacts are not normally located in the same plane. Detail of an etch step.

  9. Chemical-mechanical polishing - Wikipedia

    en.wikipedia.org/wiki/Chemical-mechanical_polishing

    The wafer that is being polished is mounted upside-down in a carrier/spindle on a backing film. The retaining ring (Figure 1) keeps the wafer in the correct horizontal position. During the process of loading and unloading the wafer onto the tool, the wafer is held by vacuum by the carrier to prevent unwanted particles from building up on the ...