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A Sun UltraSPARC II microprocessor (1997) SPARC (Scalable Processor ARChitecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. [1] [2] Its design was strongly influenced by the experimental Berkeley RISC system developed in the early 1980s.
Sun SPARCstation 1+ "pizzabox", 25 MHz SPARC processor, early 1990s SPARCstation Voyager. The SPARCstation, SPARCserver and SPARCcenter product lines are a series of SPARC-based computer workstations and servers in desktop, desk side (pedestal) and rack-based form factor configurations, that were developed and sold by Sun Microsystems.
The T1 is a new-from-the-ground-up SPARC microprocessor implementation that conforms to the UltraSPARC Architecture 2005 specification [1] and executes the full SPARC V9 instruction set. Sun has produced two previous multicore processors (UltraSPARC IV and IV+), but UltraSPARC T1 was its first microprocessor that is both multicore and ...
The UltraSPARC is a microprocessor developed by Sun Microsystems and fabricated by Texas Instruments, introduced in mid-1995. It is the first microprocessor from Sun to implement the 64-bit SPARC V9 instruction set architecture (ISA). Marc Tremblay was a co-microarchitect.
The SPARCstation IPC (Sun 4/40) is a version of the SPARCstation 1+ in a lunchbox style case and onboard video. The SPARCstation SLC (Sun 4/20) is a version of the SPARCstation 1+ built into a monitor cabinet, announced in May 1990. [8] The SPARCstation 2 (Sun 4/75) is the machine's successor and was released in November 1990.
The UltraSPARC II, code-named "Blackbird", is a microprocessor implementation of the SPARC V9 instruction set architecture (ISA) developed by Sun Microsystems. Marc Tremblay was the chief architect. Introduced in 1997, it was further development of the UltraSPARC operating at higher clock frequencies of 250 MHz, eventually reaching 650 MHz.
The SPARCstation 2, or SS2 (code named Calvin, Sun 4/75) is a SPARC workstation computer sold by Sun Microsystems. It is based on the sun4c architecture, and is implemented in a pizza box form factor. SPARCstation 2's
The chip is the first Sun/Oracle SPARC chip to use dynamic threading [3] and out-of-order execution. [4] It incorporates one floating point unit and one dedicated cryptographic unit per core. [ 2 ] The cores use the 64-bit SPARC Version 9 architecture running at frequencies between 2.85 GHz and 3.0 GHz, and are built in a 40 nm process with a ...