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This example encoder implementation describes a classic turbo encoder, and demonstrates the general design of parallel turbo codes. This encoder implementation sends three sub-blocks of bits. The first sub-block is the m -bit block of payload data.
For example, an overall code rate of 1/2 may be achieved by puncturing the outer convolutional code to rate 3/4 and the inner convolutional code to rate 2/3. A recursive inner convolutional code is preferable for turbo decoding of the SCCC. The inner code may be punctured to a rate as high as 1/1 with reasonable performance.
The description above is given for what is now called a serially concatenated code. Turbo codes, as described first in 1993, implemented a parallel concatenation of two convolutional codes, with an interleaver between the two codes and an iterative decoder that passes information forth and back between the codes. [6]
These codes proved especially useful for iterative processing including the processing of concatenated codes such as turbo codes. [ 1 ] Using the "convolutional" terminology, a classic convolutional code might be considered a Finite impulse response (FIR) filter, while a recursive convolutional code might be considered an Infinite impulse ...
LDPC codes have no limitations of minimum distance, [34] that indirectly means that LDPC codes may be more efficient on relatively large code rates (e.g. 3/4, 5/6, 7/8) than turbo codes. However, LDPC codes are not the complete replacement: turbo codes are the best solution at the lower code rates (e.g. 1/6, 1/3, 1/2). [35] [36]
An example of incremental redundancy HARQ is HSDPA: the data block is first coded with a punctured 1/3 Turbo code, then during each (re)transmission the coded block is usually punctured further (i.e. only a fraction of the coded bits are chosen) and sent. The puncturing pattern used during each (re)transmission is different, so different coded ...
Convolutional codes are processed on a bit-by-bit basis. They are particularly suitable for implementation in hardware, and the Viterbi decoder allows optimal decoding. Block codes are processed on a block-by-block basis. Early examples of block codes are repetition codes, Hamming codes and multidimensional parity-check codes.
An example EXIT chart showing two components "right" and "left" and an example decoding (blue) An extrinsic information transfer chart, commonly called an EXIT chart, is a technique to aid the construction of good iteratively-decoded error-correcting codes (in particular low-density parity-check (LDPC) codes and Turbo codes).