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A gated SR latch circuit diagram constructed from AND gates (on left) and NOR gates (on right) A gated SR latch can be made by adding a second level of NAND gates to an inverted SR latch. The extra NAND gates further invert the inputs so a SR latch becomes a gated SR latch (a SR latch would transform into a gated SR latch with inverted enable).
Active-low SR latch symbol, but lacks /Q output See also: Set-Reset latch A 555 timer can act as an active-low SR latch (though without an inverted Q output) with two outputs: output pin is a push-pull output, discharge pin is an open-collector output (requires a pull-up resistor ).
SR latch with enable. ... Description=Symbol for a D-type Flip-flop |Source=Own Drawing in Inkscape 0.43 ... Usage on sr.wikipedia.org
Gate-level Diagram of a NAND-gate SR Flip-flop: Date: 17 June 2006: Source: Own Drawing in Inkscape 0.43: Author: jjbeard: Permission (Reusing this file) PD: Other versions: Unified series of flip-flop symbols
The following other wikis use this file: Usage on de.wikipedia.org Flipflop; Usage on en.wiktionary.org level-triggered; Usage on fr.wikibooks.org
SR latch with enable. D-type transparent latch. ... 1=The symbol of a JK flip-flop without asynchronous set/reset.}} |Source=Own work by uploader ...
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