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Idle is a state that a computer processor is in when it is not being used by any program. Every program or task that runs on a computer system occupies a certain amount of processing time on the CPU. If the CPU has completed all tasks it is idle. Modern processors use idle time to save power.
In Windows NT operating systems, the System Idle Process contains one or more kernel threads which run when no other runnable thread can be scheduled on a CPU. In a multiprocessor system, there is one idle thread associated with each CPU core. For a system with hyperthreading enabled, there is an idle thread for each logical processor.
An idle computer has a load number of 0 (the idle process is not counted). Each process using or waiting for CPU (the ready queue or run queue) increments the load number by 1. Each process that terminates decrements it by 1. Most UNIX systems count only processes in the running (on CPU) or runnable (waiting for CPU) states.
In multiprocessor computer systems, software lockout is the issue of performance degradation due to the idle wait times spent by the CPUs in kernel-level critical sections. Software lockout is the major cause of scalability degradation in a multiprocessor system, posing a limit on the maximum useful number of processors.
Mode protection may extend to resources beyond the CPU hardware itself. Hardware registers track the current operating mode of the CPU, but additional virtual-memory registers, page-table entries, and other data may track mode identifiers for other resources. For example, a CPU may be operating in Ring 0 as indicated by a status word in the CPU ...
typical thermal power, which is measured under normal load (for instance, AMD's average CPU power) maximum thermal power, which is measured under a worst-case load; For example, the Pentium 4 2.8 GHz has a 68.4 W typical thermal power and 85 W maximum thermal power. When the CPU is idle, it will draw far less than the typical thermal power.
The dynamic power (switching power) dissipated by a chip is C·V 2 ·A·f, where C is the capacitance being switched per clock cycle, V is voltage, A is the Activity Factor [1] indicating the average number of switching events per clock cycle by the transistors in the chip (as a unitless quantity) and f is the clock frequency.
reengineered P6-based microarchitecture used in Intel Core 2 and Xeon microprocessors, built on a 65 nm process, supporting x86-64 level SSE instruction and macro-op fusion and enhanced micro-op fusion with a wider front end and decoder, larger out-of-order core and renamed register, support loop stream detector and large shadow register file.