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A CMOS transistor NAND element. V dd denotes positive voltage.. In CMOS logic, if both of the A and B inputs are high, then both the NMOS transistors (bottom half of the diagram) will conduct, neither of the PMOS transistors (top half) will conduct, and a conductive path will be established between the output and Vss (ground), bringing the output low.
It is also called the complement gate [2] because it produces the ones' complement of a binary number, swapping 0s and 1s. The NOT gate is one of three basic logic gates from which any Boolean circuit may be built up. Together with the AND gate and the OR gate, any function in binary mathematics may be implemented.
[1] [2] A well-known complete set of connectives is { AND, NOT}. Each of the singleton sets { NAND} and { NOR} is functionally complete. However, the set { AND, OR} is incomplete, due to its inability to express NOT. A gate (or set of gates) that is functionally complete can also be called a universal gate (or a universal set of gates).
The NAND gate has the property of functional completeness, which it shares with the NOR gate. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates. [2] An entire processor can be created using NAND gates alone. In TTL ICs using multiple-emitter transistors, it also requires fewer transistors than a NOR gate.
The transformation is easy to describe if the circuit is wholly constructed out of 2-input NAND gates (a functionally-complete set of Boolean operators): assign every net in the circuit a variable, then for each NAND gate, construct the conjunctive normal form clauses (v 1 ∨ v 3) ∧ (v 2 ∨ v 3) ∧ (¬v 1 ∨ ¬v 2 ∨ ¬v 3), where v 1 ...
Practically all digital circuits (the major exception is DRAM) are built up from NAND, NOR, NOT, and transmission gates; see more details in Truth function in computer science. Logical operators over bit vectors (corresponding to finite Boolean algebras ) are bitwise operations .
An XNOR gate can be implemented using a NAND gate and an OR-AND-Invert gate, as shown in the following picture. [3] This is based on the identity ¯ (¯) ¯ An alternative, which is useful when inverted inputs are also available (for example from a flip-flop), uses a 2-2 AND-OR-Invert gate, shown on below on the right.
[2] DCTL is close to the simplest possible digital logic family, using close to fewest possible components per logical element. [3] A similar logic family, direct-coupled transistor–transistor logic, is faster than ECL. [4] John T. Wallmark and Sanford M. Marcus described direct-coupled transistor logic using JFETs. It was termed direct ...