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  2. Chemical-mechanical polishing - Wikipedia

    en.wikipedia.org/wiki/Chemical-mechanical_polishing

    The pad and wafer are pressed together by a dynamic polishing head and held in place by a plastic retaining ring. The dynamic polishing head is rotated with different axes of rotation (i.e., not concentric). This removes material and tends to even out any irregular topography, making the wafer flat or planar. This may be necessary to set up the ...

  3. RCA clean - Wikipedia

    en.wikipedia.org/wiki/RCA_clean

    The RCA clean is a standard set of wafer cleaning steps which need to be performed before high-temperature processing steps (oxidation, diffusion, CVD) of silicon wafers in semiconductor manufacturing. Werner Kern developed the basic procedure in 1965 while working for RCA, the Radio Corporation of America.

  4. Etching (microfabrication) - Wikipedia

    en.wikipedia.org/wiki/Etching_(microfabrication)

    Etching is a critically important process module in fabrication, and every wafer undergoes many etching steps before it is complete. For many etch steps, part of the wafer is protected from the etchant by a "masking" material which resists etching. In some cases, the masking material is a photoresist which has been patterned using photolithography.

  5. Platen - Wikipedia

    en.wikipedia.org/wiki/Platen

    In semiconductor manufacturing, specifically chemical-mechanical planarization, a flat, rotating platen covered with a pad is used to polish semiconductor wafers (see image). [ 2 ] Screen printing

  6. wafer-to-wafer (also wafer-on-wafer) stacking – bonding and integrating whole processed wafers atop one another before dicing the stack into dies wire bonding – using tiny wires to interconnect an IC or other semiconductor device with its package (see also thermocompression bonding, flip chip, hybrid bonding, etc.)

  7. Non-contact wafer testing - Wikipedia

    en.wikipedia.org/wiki/Non-contact_wafer_testing

    The wafer is lifted by the wafer prober until metal pads on one or more ICs on the wafer make physical contact with the probes. A certain amount of over-travel is required after the first probe makes contact with the wafer, for two reasons: to guarantee that all probes have made contact (to account for non-planarity of the wafer)