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List of free analog and digital electronic circuit simulators, available for Windows, macOS, Linux, and comparing against UC Berkeley SPICE.The following table is split into two groups based on whether it has a graphical visual interface or not.
In 2003, ModelSim 5.8 was the first simulator to begin supporting features of the Accellera SystemVerilog 3.0 standard. [1] In 2005 Mentor introduced Questa to provide high performance Verilog and SystemVerilog simulation and expand Verification capabilities to more advanced methodologies such as Assertion Based Verification and Functional ...
Verilator is a software programming tool which converts the hardware description language Verilog to a cycle-accurate behavioral model in the programming languages C++ or SystemC. The generated models are cycle-accurate and 2-state; as a consequence, the models typically offer higher performance than the more widely used event-driven simulators ...
Released under the GNU General Public License, Icarus Verilog is free software, an alternative to proprietary software like Cadence's Verilog-XL. As of release 0.9, Icarus is composed of a Verilog compiler (including a Verilog preprocessor) with support for plug-in backends, and a virtual machine that simulates the design.
TINA software is available in installable and cloud-based versions. Feature versions exist for use in industry [6] and for educational use. [2] [7] TINA allows simulation, design, and real-time testing of hardware description language (HDL), such as VHDL, VHDL-AMS, Verilog, Verilog-A, Verilog-AMS, SystemVerilog and SystemC and for microcontroller (MCU) circuits, [2] as well as mixed electronic ...
ModelSim is a multi-language environment by Siemens [1] (previously developed by Mentor Graphics, [2]) for simulation of hardware description languages such as VHDL, Verilog and SystemC, and includes a built-in C debugger. [3] [2] ModelSim can be used independently, or in conjunction with Intel Quartus Prime, PSIM, [4] Xilinx ISE or Xilinx ...
LISA (Language for Instruction Set Architectures) is a language to describe the instruction set architecture of a processor.LISA captures the information required to generate software tools (compiler, assembler, instruction set simulator, ...) and implementation hardware (in VHDL or Verilog) of a given processor.
Unified linker / elaborator for Verilog, VHDL, and SystemC libraries. Generates a simulation object file referred to as a snapshot image. NC Sim ncsim Unified simulation engine for Verilog, VHDL, and SystemC. Loads snapshot images generated by NC Elaborator. This tool can be run in GUI mode or batch command-line mode.