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In electronics, emitter-coupled logic (ECL) is a high-speed integrated circuit bipolar transistor logic family. ECL uses an overdriven bipolar junction transistor (BJT) differential amplifier with single-ended input and limited emitter current to avoid the saturated (fully on) region of operation and the resulting slow turn-off behavior. [ 2 ]
A level shifter connects one digital circuit that uses one logic level to another digital circuit that uses another logic level. Often two level shifters are used, one at each system: A line driver converts from internal logic levels to standard interface line levels; a line receiver converts from interface levels to internal voltage levels.
Current mode logic (CML), or source-coupled logic (SCL), is a digital design style used both for logic gates and for board-level digital signaling of digital data.. The basic principle of CML is that current from a constant current generator is steered between two alternate paths depending on whether a logic zero or logic one is being represented.
In computer engineering, a logic family is one of two related concepts: . A logic family of monolithic digital integrated circuit devices is a group of electronic logic gates constructed using one of several different designs, usually with compatible logic levels and power supply characteristics within a family.
The NIM standard also specifies cabling, connectors, impedances and levels for logic signals. The fast logic standard (commonly known as NIM logic) is a current-based logic, negative "true" (at −16 mA into 50 ohms = −0.8 volts) and 0 mA for "false"; an ECL-based logic [clarify] is also specified. Apart from the above-mentioned mechanical ...
Compared to contemporary ECL circuits, TTL uses less power and has easier design rules but is substantially slower. Designers can combine ECL and TTL devices in the same system to achieve best overall performance and economy, but level-shifting devices are required between the two logic families.
The voltages for logic 1 and 0 of normal ECL (particularly ECL 10,000 series) are missing. The section "Power supplies and logic levels" has nice descriptions of other things, but completely fails to give any figures for logic levels.
In metastable states, the circuit may be unable to settle into a stable '0' or '1' logic level within the time required for proper circuit operation. As a result, the circuit can act in unpredictable ways, and may lead to a system failure, sometimes referred to as a "glitch". [2] Metastability is an instance of the Buridan's ass paradox.