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Coherent Accelerator Processor Interface (CAPI), is a high-speed processor expansion bus standard for use in large data center computers, initially designed to be layered on top of PCI Express, for directly connecting central processing units (CPUs) to external accelerators like graphics processing units (GPUs), ASICs, FPGAs or fast storage.
PCI Express Mini Card (also known as Mini PCI Express, Mini PCIe, Mini PCI-E, mPCIe, and PEM), based on PCI Express, is a replacement for the Mini PCI form factor. It is developed by the PCI-SIG . The host device supports both PCI Express and USB 2.0 connectivity, and each card may use either standard.
PCIe lanes [d] Gen 4 None ×8 ×12 x10 x12 ×8 ×12 Gen 3 Up to ×8 Up to ×4 Up to ×8 Up to x4 Up to ×4 Up to ×8 USB support USB 2.0: 6 12 6 12 USB 3.2 Gen 1x1 (5 Gb/s) 2 None None USB 3.2 Gen 2x1 (10 Gb/s) 2 4 8 2 6 4 8 USB 3.2 Gen 2x2 (20 Gb/s) None 1 [e] 2 [f] None 1 [e] 2 [f] Storage features SATA III ports Up to 4 Up to 8 Up to 4 Up to ...
Model Release date PCIe support [a] Multi-GPU USB support [b] Storage features Processor overclocking TDP CPU support Architecture Part number CrossFire SLI SATA ports RAID AMD StoreMI
PCI Express 3.0 (×8 link) [n] 64 Gbit/s: 7.88 GB/s: 2011 PCI Express 2.0 (×16 link) [n] 80 Gbit/s: 8 GB/s: 2007 RapidIO Gen2 16x: 80 Gbit/s: 10 GB/s: PCI Express 5.0 (×4 link) 128 Gbit/s: 15.75 GB/s: 2019 PCI Express 3.0 (×16 link) [n] 128 Gbit/s: 15.75 GB/s: 2011 CAPI: 128 Gbit/s: 15.75 GB/s: 2014 QPI (4.80GT/s, 2.40 GHz) 153.6 Gbit/s: 19. ...
On August 2, 2022, the CXL Specification 3.0 was released, based on PCIe 6.0 physical interface and PAM-4 coding with double the bandwidth; new features include fabrics capabilities with multi-level switching and multiple device types per port, and enhanced coherency with peer-to-peer DMA and memory sharing.
PCI Express 4.0 [33] (Pentium and Celeron CPUs are limited to PCI Express 3.0) Integrated Thunderbolt 4 (includes USB4) LPDDR4X-4267 memory support; LPDDR5-5400 "architecture capability" (Intel expected Tiger Lake products with LPDDR5 to be available around Q1 2021 but never released them) [34] [35] [36]
The specification would be based on the PCI Express interface and NVM Express protocol. On 18 April 2017 the CompactFlash Association published the CFexpress 1.0 specification. [2] Version 1.0 will use the XQD form-factor (38.5 mm × 29.8 mm × 3.8 mm) with two PCIe 3.0 lanes for speeds up to 2 GB/s. NVMe 1.2 is used for low-latency access, low ...