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Included in the Ryzen and Epyc CPU lines. AMD Zen Family 17h – first generation Zen architecture based on 14 nm process. First AMD architecture to implement simultaneous multithreading and Infinity Fabric. AMD Zen+ Family 17h – revised Zen architecture (optimisation and die shrink to 12 nm).
Llano AMD Fusion (K10 cores + Redwood-class GPU) (launch Q2 2011, this is the first AMD APU) uses Socket FM1 Bulldozer architecture; Bulldozer, Piledriver, Steamroller, Excavator (2011–2017) [ edit ]
Architecture Fabrication (nm) Family Release Date Code name Model Group Cores SMT Clock rate Bus Speed & Type [a] Cache Socket Memory Controller Features L1 L2 L3 SIMD Speed/Power Other Changes Am386 Am386: Sx/SxL/SxLV [1] 1 No 25–40 [1] FSB 100 PQFP [1] discrete: Am486 [2] 500, 350 Am486: 1 No 25–120 FSB 8 168 pin PGA 208 SQFP discrete ...
The AMD 4700S and 4800S desktop processors are part of a "desktop kit" that comes bundled with a motherboard and GDDR6 RAM. The CPU is soldered, and provides 4 PCIe 2.0 lanes. These are reportedly cut-down variants of the APUs found on the PlayStation 5 and Xbox Series X and S repurposed from defective chip stock.
Zen 3 was released on November 5, 2020, [30] using a more matured 7 nm manufacturing process, powering Ryzen 5000 series CPUs and APUs [30] (codename "Vermeer" (CPU) and "Cézanne" (APU)) and Epyc processors (codename "Milan"). Zen 3's main performance gain over Zen 2 is the introduction of a unified CCX, which means that each core chiplet is ...
Two AMD Ryzen 9000 series microprocessors with Zen 5 architecture. Zen 5 is the name for a CPU microarchitecture by AMD, shown on their roadmap in May 2022, [3] launched for mobile in July 2024 and for desktop in August 2024. [4] It is the successor to Zen 4 and is currently fabricated on TSMC's N4X process. [5]
Zen 4 is the name for a CPU microarchitecture designed by AMD, released on September 27, 2022. [4] [5] [6] It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. [7]
AMD K6: 1997 6 Superscalar, branch prediction, speculative execution, out-of-order execution, register renaming [b] AMD K6-III: 1999 Branch prediction, speculative execution, out-of-order execution [1] AMD K7: 1999 Out-of-order execution, branch prediction, Harvard architecture: AMD K8: 2003 64-bit, integrated memory controller, 16 byte ...