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Driven by Moore's law in the semiconductor industries, the shrinking of the chip size and critical dimension continues. The term applies to any lithography method which uses a shorter-wavelength light or beam type than the current state of the art, such as X-ray lithography , electron beam lithography , focused ion beam lithography, and ...
In 2003, IBM was reported to be among primary proponents of the technology. [5] In 2002, Intel had featured strained silicon technology in its 90nm X86 Pentium microprocessors series in early 2000. [5] In 2005, Intel was sued by AmberWave company for alleged patent infringement related to strained silicon technology. [citation needed]
In 2003, a research team at NEC fabricated the first MOSFETs with a channel length of 3 nm, using the PMOS and NMOS processes. [20] [21] In 2006, a team from the Korea Advanced Institute of Science and Technology (KAIST) and the National Nano Fab Center, developed a 3 nm width multi-gate MOSFET, the world's smallest nanoelectronic device, based on gate-all-around technology.
The criteria for this list is that the technology must: Exist in some way; purely hypothetical technologies cannot be considered emerging and should be covered in the list of hypothetical technologies instead. However, technologies being actively researched and prototyped are acceptable. Have a Wikipedia article or adjacent citation covering them.
Advanced packaging [1] is the aggregation and interconnection of components before traditional integrated circuit packaging where a single die is packaged. Advanced packaging allows multiple devices, including electrical, mechanical, or semiconductor devices, to be merged and packaged as a single electronic device.
Microelectronics International is a peer-reviewed scientific journal.It is published quarterly by Emerald Group Publishing, and the editor is John Atkinson.It covers research on miniaturized electronic devices, microcircuit engineering, semiconductor technology, and systems engineering.