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MMX is a single instruction, multiple data instruction set architecture designed by Intel, introduced on January 8, 1997 [1] [2] with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". [3]
The x86 instruction set has several times been extended with SIMD (Single instruction, multiple data) instruction set extensions.These extensions, starting from the MMX instruction set extension introduced with Pentium MMX in 1997, typically define sets of wide registers and instructions that subdivide these registers into fixed-size lanes and perform a computation for each lane in parallel.
Below is the full 8086/8088 instruction set of Intel (81 instructions total). [2] These instructions are also available in 32-bit mode, in which they operate on 32-bit registers (eax, ebx, etc.) and values instead of their 16-bit (ax, bx, etc.) counterparts.
Intel's first IA-32 SIMD effort was the MMX instruction set. MMX had two main problems: it re-used existing x87 floating-point registers making the CPUs unable to work on both floating-point and SIMD data at the same time, and it only worked on integers. SSE floating-point instructions operate on a new independent register set, the XMM ...
In October 1996, the Pentium MMX [7] was introduced, complementing the same basic microarchitecture of the original Pentium with the MMX instruction set, larger caches, and some other enhancements. Intel discontinued the P5 Pentium processors (sold as a cheaper product since the release of the Pentium II in 1997) in early 2000 in favor of the ...
The 3DNow! instruction set extension was introduced in the AMD K6-2, mainly adding support for floating-point SIMD instructions using the MMX registers (two FP32 components in a 64-bit vector register). The instructions were mainly promoted by AMD, but were supported on some non-AMD CPUs as well. The processors supporting 3DNow! were:
These instructions are commonly known as "Extended MMX instructions". These instructions debuted in May 1999, in the Intel Pentium III Processor, as part of the SSE instruction set. Next month, in late June 1999, AMD's Athlon processor was released which featured the extended MMX instructions, but not SSE.
A small number of additional instructions. The 80188 was a version with an 8-bit bus. 286 first x86 processor with protected mode including segmentation based virtual memory management. Performance improved by a factor of 3 to 4 over 8086. Included instructions relating to protected mode. The 80286 had a 24-bit address bus.