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In electronics, a wafer (also called a slice or substrate) [1] is a thin slice of semiconductor, such as a crystalline silicon (c-Si, silicium), used for the fabrication of integrated circuits and, in photovoltaics, to manufacture solar cells. The wafer serves as the substrate for microelectronic devices built in and upon
wafer-to-wafer (also wafer-on-wafer) stacking – bonding and integrating whole processed wafers atop one another before dicing the stack into dies wire bonding – using tiny wires to interconnect an IC or other semiconductor device with its package (see also thermocompression bonding, flip chip, hybrid bonding, etc.)
Both wafers and reticles can be handled by SMIF pods in a semiconductor fabrication environment. Used in lithographic tools, reticles or photomasks contain the image that is exposed on a coated wafer in one processing step of a complete integrated semiconductor manufacturing cycle. Because reticles are linked so directly with wafer processing ...
Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon (EGS) or other semiconductor (such as GaAs) through processes such as photolithography. The wafer is cut into many pieces, each containing one copy of the circuit. Each of these pieces is called a die.
Doping a semiconductor with a small proportion of an atomic impurity, such as phosphorus or boron, greatly increases the number of free electrons or holes within the semiconductor. When a doped semiconductor contains excess holes, it is called a p-type semiconductor ( p for positive electric charge ); when it contains excess free electrons, it ...
Wafer fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits on semiconductor wafers in a semiconductor device fabrication process. Examples include production of radio frequency amplifiers, LEDs, optical computer components, and microprocessors for computers. Wafer ...
Wafering is the process by which a silicon crystal is made into wafers. This process is usually carried out by a multi-wire saw which cuts multiple wafers from the same crystal at the same time. These wafers are then polished to the desired degree of flatness and thickness.
Wafer-to-wafer bonding can reduce yields, since if any 1 of N chips in a 3D IC are defective, the entire 3D IC will be defective. Moreover, the wafers must be the same size, but many exotic materials (e.g. III-Vs) are manufactured on much smaller wafers than CMOS logic or DRAM (typically 300 mm), complicating heterogeneous integration.