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  2. Intel AMT versions - Wikipedia

    en.wikipedia.org/wiki/Intel_AMT_versions

    Intel Active Management Technology (AMT) is hardware-based technology built into PCs with Intel vPro technology.AMT is designed to help sys-admins remotely manage and secure PCs out-of-band when PC power is off, the operating system (OS) is unavailable (hung, crashed, corrupted, missing), software management agents are missing, or hardware (such as a hard disk drive or memory) has failed.

  3. Machine Check Architecture - Wikipedia

    en.wikipedia.org/wiki/Machine_check_architecture

    In computing, Machine Check Architecture (MCA) is an Intel and AMD mechanism in which the CPU reports hardware errors to the operating system.. Intel's P6 and Pentium 4 family processors, AMD's K7 and K8 family processors, as well as the Itanium architecture implement a machine check architecture that provides a mechanism for detecting and reporting hardware (machine) errors, such as: system ...

  4. Machine-check exception - Wikipedia

    en.wikipedia.org/wiki/Machine-check_exception

    In some cases, the CPU will shut itself off once passing a thermal limit to avoid permanent damage. But they can also be caused by bus errors introduced by other failing components, like memory or I/O devices. Possible causes include: Poor CPU cooling due to a CPU heatsink and case fans (or filters) that's clogged with dust or has come loose.

  5. Triple fault - Wikipedia

    en.wikipedia.org/wiki/Triple_fault

    On the IBM AT and compatibles, the documented method of doing this was to use a special function on the Intel 8042 keyboard controller, which would assert the RESET pin of the processor. However, intentionally triple-faulting the CPU was found to cause the transition to occur much faster (0.8 milliseconds instead of 15+ milliseconds) and more ...

  6. Intel microcode - Wikipedia

    en.wikipedia.org/wiki/Intel_Microcode

    Intel distributes microcode updates as a 2,048 (2 kilobyte) binary blob. [1] The update contains information about which processors it is designed for, so that this can be checked against the result of the CPUID instruction. [1] The structure is a 48-byte header, followed by 2,000 bytes intended to be read directly by the processor to be ...

  7. Intel Management Engine - Wikipedia

    en.wikipedia.org/wiki/Intel_Management_Engine

    The Intel Management Engine (ME), also known as the Intel Manageability Engine, [1] [2] is an autonomous subsystem that has been incorporated in virtually all of Intel's processor chipsets since 2008. [1] [3] [4] It is located in the Platform Controller Hub of modern Intel motherboards.

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  9. x86 instruction listings - Wikipedia

    en.wikipedia.org/wiki/X86_instruction_listings

    In early processors, the TSC was a cycle counter, incrementing by 1 for each clock cycle (which could cause its rate to vary on processors that could change clock speed at runtime) – in later processors, it increments at a fixed rate that doesn't necessarily match the CPU clock speed. [m] Usually 3 [n] Intel Pentium, AMD K5, Cyrix 6x86MX ...

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